The emulator part of the breaks chip-reversing project
A gate-level NES / Famicom / Dendy emulator.
The chips are not emulated “by behavior”: the logic circuits reconstructed from the real dies are duplicated in C++, so the emulated 6502 behaves the same way the real one does — same gates, same flip-flops, same buses, same quirks.
The 6502 (M6502Core), the 2A03/2A07 CPU+audio (APUSim) and the 2C02 PPU (PPUSim) run the logic recovered from the real dies — down to internal signals and timing anomalies. MMC1 is modeled as a chip too.
A board is a JSON document of components and wiring (CartPcb), not C++ code. ROMs are identified by the CRC32 of their PRG/CHR dumps against the nescartdb-derived database.
A WinForms managed app and an SDL2 port that builds on Windows and Linux — with unit tests, debug tools and an IO subsystem for NES, Famicom and Dendy controllers.
The emulator at a glance: what is inside, repository map, simulation components, tools, build.
Capturing the PPU video signal with PPUPlayer and Nintendulator — including the RAW pixel dump format.
A case study: verifying the game against the real cartridge and fixing it in Breaknes (issue #527).
Functional simulation of cartridge PCBs: a board is a JSON document of components and wiring, not C++ code.
The converted cartridge database in JSON — PCB identification by the CRC32 of PRG/CHR dumps.
Controllers and devices for NES, Famicom and Dendy, and the architecture binding them to the motherboard.
Gate-level simulators: M6502Core (6502), APUSim (2A03/2A07), PPUSim (2C02/2C07), MMC1.
Shared libraries: BaseLogicLib, BaseBoardLib (LS139, LS373, SRAM, RomChip…), JsonLib, SharpTools.
The native core — motherboards, chip wiring, debug hub — and the two front-ends.
Six pull requests merged on August 30–31, 2026: a unified logging facility, the IO subsystem ported to SDL2, up to two TV Sets with PPU⇄TV binding, the board database aligned with real motherboard revisions, the project icon, and the CartPcb rework (scroll jumper, glue logic as chips, iNES fallback).